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MSB-BASED ERROR CORRECTION FOR FLASH MEMORY SYSTEM
A flash memory system includes a multi-bit flash memory device having a memory cell array including memory cells arranged in rows and columns; a read circuit configured to read data from the memory cell array; and control logic configured to control the read circuit so as to successively read data from a selected memory cell and adjacent memory cells to the selected memory cell in response to a request for a read operation with respect to MSB data stored in the selected memory cell. A compare circuit is configured to compare data read from the adjacent memory cells to the selected memory cell provided from the multi-bit flash memory device and to correct data read from the selected memory cells based upon the comparison result.
Filed on: 2010-07-14; Application Number: 12836249
Applicant(s)Seung Jae Lee
Dong Ku Kang
Jun Jin Kong